Principle Triton Compiler Engineer

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Principle Triton Compiler Engineer
THE ROLE:
Triton is a widely adopted language and compiler for high-performance GPU kernels, powering major AI frameworks such as PyTorch, vLLM, and SGLang. As AI workloads increasingly rely on Triton-based kernels, first-class Triton support is strategically critical to AMD’s AI software roadmap.AMD GPUs are an official Triton backend; delivering industry-leading Triton performance on AMD Instinct accelerators is a top priority for AMD. The performance and usability of Triton directly impact the competitiveness of AMD hardware in large-scale AI training and inference.
In this role, you will advance the Triton compiler stack for AMD CDNA and next-generation GPU architectures — building robust compiler infrastructure, unlocking peak hardware efficiency, and collaborating closely with architecture teams to make AMD GPUs a best-in-class platform for Triton-powered AI workloads.
THE PERSON:
The ideal candidate has deep expertise in compiler technologies, GPU architecture, and performance engineering. You are comfortable working across the full stack — from high-level IR transformations down to ISA-level performance tuning — and can perform rigorous quantitative analysis to drive measurable improvements.
You thrive in highly technical environments, enjoy solving complex performance problems, and are excited to collaborate across compiler, runtime, and hardware teams. Most importantly, you are curious, hands-on, and willing to learn and work across boundaries.
KEY RESPONSIBILITIES:
Develop and maintain the Triton compiler AMD backend targeting CDNA and future GPU architectures
Design and implement MLIR/LLVM-based lowering pipelines and backend code generation
Improve and extend compilation passes, optimization patterns, and codegen quality in Triton
Research, implement, and optimize high-performance matmul, attention, and fused transformer kernels in Triton
Optimize memory hierarchy usage (LDS, HBM), wave-level execution, occupancy, and instruction scheduling
Profile and analyze kernel performance on AMD Instinct GPUs; identify and eliminate bottlenecks
Debug and fix issues across the stack, including Triton, ROCm, and LLVM AMDGPU backend
Collaborate closely with GPU architecture and performance teams to co-design performance-critical features
Contribute to open-source Triton, LLVM, and ROCm ecosystems
PREFERRED EXPERIENCE:
7+ years of experience in compiler development, GPU software, or performance engineering
Strong familiarity or hands-on experience with Triton
Deep understanding of modern GPU architectures (wavefront execution, memory hierarchy, scheduling, occupancy)
Strong knowledge of MLIR and/or LLVM internals
Experience implementing compiler optimizations, backend code generation, or register allocation
Extensive experience writing and tuning high-performance GPU kernels
Familiarity with ROCm, HIP, CUDA, or similar parallel programming environments
Experience debugging complex cross-stack issues and reducing user problems to actionable fixes
Open-source development experience and collaborative engineering mindset
Effective communication and problem-solving skills
Motivating leader with good interpersonal skills
ACADEMIC CREDENTIALS:
Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent
This role is not eligible for visa sponsorship.
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Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.